1. Field of the Invention
This document relates to a display device and a method for controlling gate pulses.
2. Related Art
A liquid crystal display (“LCD”) has been widely applied due to its lightweight, thin profile, lower power consumption driving, and so on. Such an LCD has been employed as a portable computer such as a notebook PC, an office automation device, an audio/video device, an indoor/outdoor advertisement display device or the like. The LCD displays images by controlling an electric field applied to an LC layer to adjust a light from a backlight unit depending on data voltages.
An active matrix LCD includes an liquid crystal display panel assembly provided with TFTs (thin film transistors) which are formed at the respective pixels and switch data voltages supplied to pixel electrodes, data driving circuits which supply data voltages to data lines in the liquid crystal display panel assembly, gate driving circuits which sequentially supply gate pulses (or scan pulses) to gate lines in the liquid crystal display panel assembly, and a timing controller which controls operation timings of the above-described driving circuits.
In FIG. 1, a “source drive IC (integrated circuit) output” is an example of a data voltage with a positive polarity and a data voltage with a negative polarity output from the data driving circuits. “SCAN1 to SCAN4” are examples of gate pulses sequentially output from the gate driving circuits. As shown in FIG. 1, the gate pulses swing between the gate low voltage VGL and the gate high voltage VGH. The gate low voltage VGL is less than a threshold voltage of the TFT as about −5V, and the gate high voltage VGH is a voltage equal to or more than a threshold voltage of the TFT.
At the rising edge of each of the gate pulses SCAN1 to SCAN4, the voltage rapidly increases from the gate low voltage VGL to the gate high voltage VGH. At the falling edge of each of the gate pulses, the voltage rapidly decreases from the gate high voltage VGH to the gate low voltage VGL. Thereby, since the currents Ileak rapidly increase in the gate lines at the rising edges and falling edges, the power consumption in the gate driving circuits are also heightened.
In the active matrix LCD, a voltage charged in a liquid crystal cell is influenced by the kickback voltage (or feed through voltage, ΔVp) generated due to the parasitic capacitance of the TFT. The kickback voltage ΔVp is given by the following equation (1)
                              Δ          ⁢                                          ⁢          Vp                =                              Cgd                          Clc              +              Cst              +              Cgd                                ⁢                      (                          VGH              -              VGL                        )                                              (        1        )            
Where ‘Cgd’ denotes a parasitic capacitance generated between a gate terminal of the TFT connected to the gate line and a drain terminal of the TFT connected to the pixel electrode of the liquid crystal cell, and ‘VGH-VGL’ denotes a voltage difference between the gate high voltage and the gate low voltage supplied to the gate line.
This kickback voltage alters voltages applied to the pixel electrodes of the liquid crystal cells to show flickers and afterimages in a displayed image. In order to reduce the kickback voltage ΔVp, there is used a gate pulse modulation method of modulating the gate high voltage VGH at the falling edge of the gate pulse. However, the gate pulse modulation method is for reducing the kickback voltage ΔVp, but has a limitation in reducing the power consumption.